News

Feldkirchen, 30. November 2003

PSpice Webinars

PSpice Studio mit OrCAD Capture CIS:

"Using Capture CIS & PSpice Studio to Eliminate Prototypes of Analog Designs"

Type: Webinar
Date: December 4, 2003
Location: Your desktop
Registrieren für PSpice & Capture

PSpice Studio mit Concept HDL:

"Using Concept HDL & PSpice Studio to Eliminate Prototypes of Analog Designs"

Type: Webinar
Date: December 10, 2003
Location: Your desktop
Registrieren für PSpice & Concept

Inhalt

Today, most analog and mixed -signal engineers are still manufacturing design prototypes, and debugging in the lab to assess component quality, tolerances and yield specifications. However, this conventional approach can be very costly and increase design cycle times.

Who should attend?

PCB Analog and mixed-signal engineers using OrCAD Capture or Capture CIS

What you will learn:

In this webinar you will learn:

How you can eliminate prototyping and laboratory debugging

How to analyze quality, tolerance, and yield tradeoffs prior to manufacturing

How to identify stressed components, optimize to design specifications, simulate across a range of component tolerances, and identify production yields

How to determine the most cost-effective components to use, minimum design specifications that can be met, and what yields to expect from manufacturing
Speaker

John Storella-Mullin, Product Marketing Manager, Cadence Design Systems